1 www.pericom.com ps9070a 09/01/10 PI6PCIEB24 1:4 pci express? clock driver features ? p hase jitter flter for pcie? 2.0 application ? f our pairs of hcsl pcie 2.0 diferential clocks ? p rop delay < 250ps (in pll mode) ? l ow skew < 50ps ? l ow jitter < 50ps cycle-to-cycle ? < 1 p s additive rms phase jitter ? 1 00 mhz pll mode operation ? 3 .3v operation ? p ackaging (pb-free and green): 2 0-pin 4.0mm x 4.0mm x0.75mm tqfn (zd20) description pericom semiconductor's PI6PCIEB24 is a pci express? (pcie) 2.0 compliant high-speed, low-noise diferential clock bufer. te device distributes the input diferential pcie clock to four difer- ential pairs of clock outputs with zero delay pll. block diagram out0 out0# out1 out1# out2 out2# out3 out3# pll pwrdwn# src src# pll/bypass# oe_0 oe_3 pin configuration oe_3 oe_0 i ref v dd out3 out3# out2 out2# pwrdwn# v dd_a src src# pll/bypass# out0 out0# out1 out1# v dd v dd v dd 7 9 8 6 10 19 17 18 20 16 13 15 14 12 11 3 1 2 4 5 10-0210
2 www.pericom.com ps9070a 09/01/10 PI6PCIEB24 1:4 pci express? clock driver pin descriptions pin name type pin no description src & src# input 19, 20 0.7v diferential src input from pi6c410 clock synthesizer out[0:3] & out[0:3]# output 2, 3, 5, 6, 12, 11, 15, 14 0.7v diferential outputs iref input 16 external resistor connection to set the diferential output current v dd power 1, 7, 10, 18 3.3v power supply for outputs pwrdwn# input 9 3.3v lvttl active low input for power down operation vdd_a power 17 3.3v power supply for pll pll/bypass# input 8 when high, pll is enabled, when low, pll is bypassed. oe_0, oe_3 input 4, 13 when high, enables corresponding out0, out3 respectively. ground connection is through the package metal plate underneath. 10-0210
3 www.pericom.com ps9070a 09/01/10 PI6PCIEB24 1:4 pci express? clock driver functionality pwrdwn# out out# 1 normal normal 0 i ref 2 low power down (pwrdwn# assertion) pwrdwn# out# out figure 1. power down sequence when pwrdwn# is asserted (low), 2xi ref current fows through out pin. power down (pwrdwn# de-assertion) pwrdwn# out out# tdrive_pwrdwn# <300us, >200mv tstable <1ms figure 2. power down de-assert sequence 10-0210
4 www.pericom.com ps9070a 09/01/10 PI6PCIEB24 1:4 pci express? clock driver figure 9. differential clock buffer characteristics symbol minimum maximum r o 3000 n/a r os unspecifed unspecifed v out n/a 850mv current accuracy symbol conditions confguration load min. max. i out v dd = 3.30 5% r ref = 475? 1% i ref = 2.32ma nominal test load for given confguration -12% i nominal +12% i nominal i nominal refers to the expected current based on the confguration of the device. differential clock output current board target trace/term z reference r, iref = v dd /(3xrr) output current v oh @ z 100 (100 diferential 15% coupling ratio) r ref = 475 1%, i ref = 2.32ma i oh = 6 x i ref 0.7v @ 50 current-mode output buffer characteristics of out[0:3], out[0:3]# 0v i out 0.85v slope ~ 1/rs r o r os v out = 0.85v max iout v dd (3.3v 5%) figure 2. simplifed diagram of current-mode output bufer 10-0210
5 www.pericom.com ps9070a 09/01/10 PI6PCIEB24 1:4 pci express? clock driver absolute maximum ratings (over operating free-air temperature range) symbol parameters min. max. units v dd_a 3.3v core supply voltage -0.5 4.6 v v dd 3.3v i/o supply voltage -0.5 4.6 v ih input high voltage 4.6 v il input low voltage -0.5 ts storage temperature -65 150 c v esd esd protection 2000 v stress beyond those listed under absolute maximum ratings may cause permanent damage to the device. dc electrical characteristics (v dd = 3.35%, v dd_a = 3.35%) symbol parameters condition min. max. units v dd_a 3.3v core supply voltage 3.135 3.465 v v dd 3.3v i/o supply voltage 3.135 3.465 v ih 3.3v input high voltage v dd 2.0 v dd + 0.3 v il 3.3v input low voltage v ss C 0.3 0.8 i ik input leakage current 0 < v in < v dd -5 +5 a i oh output high current i oh = 6 x i ref , i ref = 2.32ma 12.2 ma 15.6 c in input pin capacitance 3 5 pf c out output pin capacitance 6 l pin pin inductance 7 nh i dd power supply current v dd = 3.465v, f cpu = 100mhz 200 ma i ss power down current driven outputs 40 t a ambient temperature -45 85 c 10-0210
6 www.pericom.com ps9070a 09/01/10 PI6PCIEB24 1:4 pci express? clock driver configuration test load board termination 475 1% 49.9 1% rp 49.9 1% rp 33 5% rs 33 5% rs PI6PCIEB24 tla tlb out out# 2pf 5% 2pf 5% ac switching characteristics (v dd = 3.35%, vdd _a = 3.35%) symbol parameters min max. units notes f in 95 105 mhz t rise / t fall rise and fall time (measured between 0.175v to 0.525v) 175 700 ps 2 d t rise / d t fall rise and fall time variation 125 ps 2 rise/fall matching 20 % 2 t pd pll mode (pll/bypass# = 1) 250 ps t jitter cycle C cycle jitter 50 ps 3, 4 v high voltage high including overshoot 660 1150 mv 2 v low voltage low including undershoot -300 mv 2 v cross absolute crossing point voltages 250 550 mv 2 fv cross total variation of vcross over all edges 140 mv 2 t dc duty cycle 45 55 % 3 t jadd additive rms phase jitter for pcie genii <0 1 ps 5 t pd(bypass) bypass mode (pll/bypass# = 0) 2.5 6.5 ns 1. t est confguration is r s = 33.2?, rp = 49.9?, and 2pf. 2. m easurement taken from single ended waveform. 3. m easurement taken from diferential waveform. 4. m easurement taken using m1 data capture analysis tool. 5. a dditive jitter is calculated from input and output rms phase jitter using pcie 2.0 flter by t jadd = (output jitter) 2 C (input jitter) 2 10-0210
7 www.pericom.com ps9070a 09/01/10 PI6PCIEB24 1:4 pci express? clock driver ordering information (1-3) ordering code package code package description PI6PCIEB24zde zd 20-pin, 4.0mm x 4.0mm, tqfn, pb-free and green 1. t ermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. e = p b-free and green 3. a dding an x sufx = tape/reel pericom semiconductor corporation ? 1-800-435-2336 1 : 20-lead, thin fine pitch quad flat no-lead (tqfn) noitpircsed :edoc egakcap 2084-dp :# lortnoc tnemucod -- :noisiver 80/11/90 :etad zd20 08-0456 packaging mechanical: 20-pin tqfn (zd) pci express and pcie are registered trademarks of pci-si please isit pcisigorg for information 10-0210
|